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ST STM32F412 User Manual

ST STM32F412
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USB on-the-go full-speed (OTG_FS) RM0402
978/1163 RM0402 Rev 6
the core interrupt register (OEPINT bit in OTG_GINTSTS or IEPINT bit in OTG_GINTSTS,
respectively) is set. Before the application can read these registers, it must first read the
device all endpoints interrupt (OTG_DAINT) register to get the exact endpoint number for
the device endpoint-x interrupt register. The application must clear the appropriate bit in this
register to clear the corresponding bits in the OTG_DAINT and OTG_GINTSTS registers
The peripheral core provides the following status checks and interrupt generation:
Transfer completed interrupt, indicating that data transfer was completed on both the
application (AHB) and USB sides
Setup stage has been done (control-out only)
Associated transmit FIFO is half or completely empty (in endpoints)
NAK acknowledge has been transmitted to the host (isochronous-in only)
IN token received when Tx FIFO was empty (bulk-in/interrupt-in only)
Out token received when endpoint was not yet enabled
Babble error condition has been detected
Endpoint disable by application is effective
Endpoint NAK by application is effective (isochronous-in only)
More than 3 back-to-back setup packets were received (control-out only)
Timeout condition detected (control-in only)
Isochronous out packet has been dropped, without generating an interrupt
29.7 OTG_FS as a USB host
This section gives the functional description of the OTG_FS in the USB host mode. The
OTG_FS works as a USB host in the following circumstances:
OTG A-host
OTG A-device default state when the A-side of the USB cable is plugged in
OTG B-host
OTG B-device after HNP switching to the host role
A-device
If the ID line is present, functional and connected to the A-side of the USB cable,
and the HNP-capable bit is cleared in the Global USB Configuration register
(HNPCAP bit in OTG_GUSBCFG). Integrated pull-down resistors are
automatically set on the DP/DM lines.
Host only
The force host mode bit (FHMOD) in the OTG USB configuration register
(OTG_GUSBCFG) forces the OTG_FS core to work as a USB host-only. In this
case, the ID line is ignored even if present on the USB connector. Integrated pull-
down resistors are automatically set on the DP/DM lines.
Note: On-chip 5 V V
BUS
generation is not supported. For this reason, a charge pump or, if 5 V are
available on the application board, a basic power switch must be added externally to drive
the 5
V V
BUS
line. The external charge pump can be driven by any GPIO output. This is
required for the OTG A-host, A-device and host-only configurations.

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ST STM32F412 Specifications

General IconGeneral
BrandST
ModelSTM32F412
CategoryMicrocontrollers
LanguageEnglish

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