ST STM32F412 User Manual

RM0402 Rev 6 1021/1163
RM0402 USB on-the-go full-speed (OTG_FS)
1122
29.15.16 OTG core ID register (OTG_CID)
Address offset: 0x03C
Reset value: 0x0000 2000
This is a register containing the Product ID as reset value.
29.15.17 OTG core LPM configuration register (OTG_GLPMCFG)
Address offset: 0x54
Reset value: 0x0000 0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
PRODUCT_ID[31:16]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
1514131211109876543210
PRODUCT_ID[15:0]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:0 PRODUCT_ID[31:0]: Product ID field
Application-programmable ID field.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res.
EN
BESL
LPMRCNTSTS[2:0]
SND
LPM
LPMRCNT[2:0] LPMCHIDX[3:0]
L1RSM
OK
rw r r r rs rw rw rw rw rw rw rw r
1514131211109876543210
SLP
STS
LPMRSP[1:0]
L1DS
EN
BESLTHRS[3:0]
L1SS
EN
REM
WAKE
BESL[3:0]
LPM
ACK
LPM
EN
r r r rw rw rw rw rw rw rw/r rw/r rw/r rw/r rw/r rw rw
Bits 31:29 Reserved, must be kept at reset value.
Bit 28 ENBESL: Enable best effort service latency
This bit enables the BESL feature as defined in the LPM errata:
0:The core works as described in the following document:
USB 2.0 Link Power Management Addendum Engineering Change Notice to the USB 2.0
specification, July 16, 2007
1:The core works as described in the LPM Errata:
Errata for USB 2.0 ECN: Link Power Management (LPM) - 7/2007
Note: Only the updated behavior (described in LPM Errata) is considered in this document
and so the ENBESL bit should be set to '1' by application SW.
Bits 27:25 LPMRCNTSTS[2:0]: LPM retry count status
Number of LPM host retries still remaining to be transmitted for the current LPM sequence.
Note: Accessible only in host mode.

ST STM32F412 Specifications

General

Brand	ST
Model	STM32F412
Category	Microcontrollers
Language	English