Figure 18. Selecting an alternate function on STM32F412xx
MSv39420V1
For pins 0 to 7, the GPIOx_AFRL[31:0] register selects the dedicated alternate function
AF0 (system)
AF1 (TIM1/TIM2)
AF2 (TIM3/5)
AF3 (TIM8/9)
AF4 (I2C1..3, I2CFMP1)
AF5 (SPI1/2/3/4)
AF6 (SPI2/3/4, DFSDM)
AF7 (SPI2, USART1..3)
AF8 (DFSDM, USART3/6, CAN1)
AF9 (I2C1..3, I2CFMP1, CAN1/2, TIM12..14, QUADSPI)
AF10 (DFSDM, FSMC, QUADSPI, OTG_FS)
AF11
AF12 (FMC, SDIO)
AF13
AF14
AF15 (EVENTOUT)
Pin x (x = 0..7)
AFRL[31:0]
For pins 8 to 15, the GPIOx_AFRH[31:0] register selects the dedicated alternate function
Pin x (x = 8..15)
AFRH[31:0]
1
1
AF0 (system)
AF1 (TIM1/TIM2)
AF2 (TIM3/5)
AF3 (TIM8/9)
AF4 (I2C1..3, I2CFMP1)
AF5 (SPI1/2/3/4)
AF6 (SPI2/3/4, DFSDM)
AF7 (SPI2, USART1..3)
AF8 (DFSDM, USART3/6, CAN1)
AF9 (I2C1..3, I2CFMP1, CAN1/2, TIM12..14, QUADSPI)
AF10 (DFSDM, FSMC, QUADSPI, OTG_FS)
AF11
AF12 (FMC, SDIO)
AF13
AF14
AF15 (EVENTOUT)