ST STM32F412 User Manual

USB on-the-go full-speed (OTG_FS) RM0402
1036/1163 RM0402 Rev 6
29.15.31 OTG host channel x transfer size register (OTG_HCTSIZx)
Address offset: 0x510 + 0x20 * x, (x = 0 to 11)
Reset value: 0x0000 0000
Bit 8 BBERRM: Babble error mask.
0: Masked interrupt
1: Unmasked interrupt
Bit 7 TXERRM: Transaction error mask.
0: Masked interrupt
1: Unmasked interrupt
Bit 6 Reserved, must be kept at reset value.
Bit 5 ACKM: ACK response received/transmitted interrupt mask.
0: Masked interrupt
1: Unmasked interrupt
Bit 4 NAKM: NAK response received interrupt mask.
0: Masked interrupt
1: Unmasked interrupt
Bit 3 STALLM: STALL response received interrupt mask.
0: Masked interrupt
1: Unmasked interrupt
Bit 2 Reserved, must be kept at reset value.
Bit 1 CHHM: Channel halted mask
0: Masked interrupt
1: Unmasked interrupt
Bit 0 XFRCM: Transfer completed mask
0: Masked interrupt
1: Unmasked interrupt
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
DO
PNG
DPID[1:0] PKTCNT[9:0] XFRSIZ[18:16]
rw
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1514131211109876543210
XFRSIZ[15:0]
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ST STM32F412 Specifications

General

Brand	ST
Model	STM32F412
Category	Microcontrollers
Language	English