MPC5604B/C Microcontroller Reference Manual, Rev. 8
Freescale Semiconductor 389
21.7.1.3 LIN status register (LINSR)
WUIE Wake-up Interrupt Enable
0 No interrupt when WUF bit in LINSR or UARTSR is set.
1 Interrupt generated when WUF bit in LINSR or UARTSR is set.
DBFIE Data Buffer Full Interrupt Enable
0 No interrupt when buffer data register is full.
1 Interrupt generated when data buffer register is full.
DBEIE Data Buffer Empty Interrupt Enable
0 No interrupt when buffer data register is empty.
1 Interrupt generated when data buffer register is empty.
DRIE Data Reception Complete Interrupt Enable
0 No interrupt when data reception is completed.
1 Interrupt generated when data received flag (DRF) in LINSR or UARTSR is set.
DTIE Data Transmitted Interrupt Enable
0 No interrupt when data transmission is completed.
1 Interrupt generated when data transmitted flag (DTF) is set in LINSR or UARTSR.
HRIE Header Received Interrupt Enable
0 No interrupt when a valid LIN header has been received.
1 Interrupt generated when a valid LIN header has been received, that is, HRF bit in LINSR is set.
Offset: 0x0008 Access: User read/write
0123456789101112131415
R 0000000000000000
W
Reset0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
RLINS 00RMB0
RBSY RPS WUF DBFF DBEF
DRF DTF HRF
Ww1c w1c w1c w1c w1c w1c w1c w1c w1c
Reset0000000001000000
Figure 21-8. LIN status register (LINSR)
Table 21-7. LINIER field descriptions (continued)
Field Description
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