MPC5604B/C Microcontroller Reference Manual, Rev. 8
Freescale Semiconductor 615
Address:
Base + 0x0028 Access: User read/write
0123456789101112131415
R0000000000000000
W
Reset0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
CIM
47
CIM
46
CIM
43
CIM
44
CIM
43
CIM
42
CIM
41
CIM
40
CIM
39
CIM
38
CIM
37
CIM
36
CIM
35
CIM
34
CIM
33
CIM
32
W
Reset0000000000000000
Figure 25-16. Channel Interrupt Mask Register 1 (CIMR1)
Address:
Base + 0x002C Access: User read/write
0123456789101112131415
R
CIM
95
CIM
94
CIM
93
CIM
92
CIM
91
CIM
90
CIM
89
CIM
88
CIM
87
CIM
86
CIM
85
CIM
84
CIM
83
CIM
82
CIM
81
CIM
80
W
Reset0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
CIM
79
CIM
78
CIM
77
CIM
76
CIM
75
CIM
74
CIM
73
CIM
72
CIM
71
CIM
70
CIM
69
CIM
68
CIM
67
CIM
66
CIM
65
CIM
64
W
Reset0000000000000000
Figure 25-17. Channel Interrupt Mask Register 2 (CIMR2)
Table 25-12. CIMR field descriptions
Field Description
CIMn Interrupt enable
When set (CIMn = 1), interrupt for channel n is enabled.
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