MPC5604B/C Microcontroller Reference Manual, Rev. 8
Freescale Semiconductor 663
Table 27-17. CFLASH_NVSLL field descriptions
Field Description
SLE Secondary Low/mid address space block Enable
This bit is used to enable the Lock registers (STSLK, SMK1-0 and SLK15-0) to be set or
cleared by registers writes.
This bit is a status bit only. The method to set this bit is to write a password, and if the
password matches, the SLE bit will be set to reflect the status of enabled, and is enabled
until a reset operation occurs. For SLE the password 0xC3C33333 must be written to the
CFLASH_SLL register.
0: Secondary Low/Mid Address Locks are disabled: STSLK, SMK1-0 and SLK15-0 cannot
be written.
1: Secondary Low/Mid Address Locks are enabled: STSLK, SMK1-0 and SLK15-0 can be
written.
STSLK Secondary Test/Shadow address space block LocK
This bit is used as an alternate means to lock the block of Test and Shadow Address Space
from Program and Erase (Erase is any case forbidden for Test block).
A value of 1 in the STSLK register signifies that the Test/shadow sector is locked for Program
and Erase.
A value of 0 in the STSLK register signifies that the Test/shadow sector is available to receive
program and erase pulses.
The STSLK register is not writable once an interlock write is completed until
CFLASH_MCR[DONE] is set at the completion of the requested operation. Likewise, the
STSLK register is not writable if a high voltage operation is suspended.
Upon reset, information from the TestFlash block is loaded into the STSLK register. The
STSLK bit may be written as a register. Reset will cause the bit to go back to its TestFlash
block value. The default value of the STSLK bit (assuming erased fuses) would be locked.
STSLK is not writable unless SLE is high.
0: Test/Shadow Address Space Block is unlocked and can be modified (also if
CFLASH_LML[TSLK] = 0).
1: Test/Shadow Address Space Block is locked and cannot be modified.
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