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ST STM32F412 User Manual

ST STM32F412
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RM0402 Rev 6 29/1163
RM0402 Contents
31
29.15.44 OTG device IN endpoint x control register (OTG_DIEPCTLx) . . . . . 1048
29.15.45 OTG device IN endpoint x interrupt register (OTG_DIEPINTx) . . . . . 1051
29.15.46 OTG device IN endpoint 0 transfer size register
(OTG_DIEPTSIZ0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1052
29.15.47 OTG device IN endpoint transmit FIFO status register
(OTG_DTXFSTSx) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1053
29.15.48 OTG device IN endpoint x transfer size register (OTG_DIEPTSIZx) . 1054
29.15.49 OTG device control OUT endpoint 0 control register
(OTG_DOEPCTL0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1055
29.15.50 OTG device OUT endpoint x interrupt register (OTG_DOEPINTx) . . 1056
29.15.51 OTG device OUT endpoint 0 transfer size register
(OTG_DOEPTSIZ0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1058
29.15.52 OTG device OUT endpoint x control register
(OTG_DOEPCTLx) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1059
29.15.53 OTG device OUT endpoint x transfer size register
(OTG_DOEPTSIZx) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1061
29.15.54 OTG power and clock gating control register (OTG_PCGCCTL) . . . 1062
29.15.55 OTG_FS register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1063
29.16 OTG_FS programming model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1071
29.16.1 Core initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1071
29.16.2 Host initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1072
29.16.3 Device initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1072
29.16.4 Host programming model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1073
29.16.5 Device programming model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1094
29.16.6 Worst case response time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1115
29.16.7 OTG programming model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1117
30 Debug support (DBG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1123
30.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1123
30.2 Reference Arm® documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1124
30.3 SWJ debug port (serial wire and JTAG) . . . . . . . . . . . . . . . . . . . . . . . . .1124
30.3.1 Mechanism to select the JTAG-DP or the SW-DP . . . . . . . . . . . . . . . 1125
30.4 Pinout and debug port pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1125
30.4.1 SWJ debug port pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1126
30.4.2 Flexible SWJ-DP pin assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1126
30.4.3 Internal pull-up and pull-down on JTAG pins . . . . . . . . . . . . . . . . . . . 1127
30.4.4 Using serial wire and releasing the unused debug pins as GPIOs . . 1128
30.5 JTAG TAP connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1128

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ST STM32F412 Specifications

General IconGeneral
BrandST
ModelSTM32F412
CategoryMicrocontrollers
LanguageEnglish

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