ST STM32F412

RM0402 Rev 6 143/1163
RM0402 Reset and clock control (RCC) for STM32F412xx
166
Bit 11 WWDGEN: Window watchdog clock enable
Set and cleared by software.
0: Window watchdog clock disabled
1: Window watchdog clock enabled
Bit 10 RTC APB: clock enable
Set and cleared by software.
0: RTC APB clock disabled
1: RTC APB clock enabled (default value).
Bit 9 Reserved, must be kept at reset value.
Bit 8 TIM14EN: TIM14 reset
Set and cleared by software.
0: does not reset TIM14
1: resets TIM14
Bit 7 TIM13EN: TIM13 reset
Set and cleared by software.
0: does not reset TIM13
1: resets TIM13
Bit 6 TIM12EN: TIM12 reset
Set and cleared by software.
0: does not reset TIM12
1: resets TIM12
Bit 5 TIM7EN: TIM7 reset
Set and cleared by software.
0: does not reset TIM7
1: resets TIM7
Bit 4 TIM6EN: TIM6 reset
Set and cleared by software.
0: does not reset TIM6
1: resets TIM6
Bit 3 TIM5EN: TIM5 clock enable
Set and cleared by software.
0: TIM5 clock disabled
1: TIM5 clock enabled
Bit 2 TIM4EN: TIM4 clock enable
Set and cleared by software.
0: TIM4 clock disabled
1: TIM4 clock enabled
Bit 1 TIM3EN: TIM3 clock enable
Set and cleared by software.
0: TIM3 clock disabled
1: TIM3 clock enabled
Bit 0 TIM2EN: TIM2 clock enable
Set and cleared by software.
0: TIM2 clock disabled
1: TIM2 clock enabled