ST STM32F412

RM0402 Rev 6 861/1163
RM0402 Serial peripheral interface/ inter-IC sound (SPI/I2S)
862
Bit 9 MCKOE: Master clock output enable
0: Master clock output is disabled
1: Master clock output is enabled
Note: This bit should be configured when the I
2
S is disabled. It is used only when the I
2
S is in master
mode.
This bit is not used in SPI mode.
Bit 8 ODD: Odd factor for the prescaler
0: real divider value is = I2SDIV *2
1: real divider value is = (I2SDIV * 2)+1
Refer to Section 26.6.4 on page 843. Not used in SPI mode.
Note: This bit should be configured when the I
2
S is disabled. It is used only when the I
2
S is in master
mode.
Bits 7:0 I2SDIV: I2S Linear prescaler
I2SDIV [7:0] = 0 or I2SDIV [7:0] = 1 are forbidden values.
Refer to Section 26.6.4 on page 843. Not used in SPI mode.
Note: These bits should be configured when the I
2
S is disabled. It is used only when the I
2
S is in
master mode.