RM0402 Rev 6 911/1163
RM0402 Secure digital input/output interface (SDIO)
921
Bits 31:12 Reserved, must be kept at reset value.
Bit 11 SDIOEN: SD I/O enable functions
If this bit is set, the DPSM performs an SD I/O-card-specific operation.
Bit 10 RWMOD: Read wait mode
0: Read Wait control stopping SDIO_D2
1: Read Wait control using SDIO_CK
Bit 9 RWSTOP: Read wait stop
0: Read wait in progress if RWSTART bit is set
1: Enable for read wait stop if RWSTART bit is set
Bit 8 RWSTART: Read wait start
If this bit is set, read wait operation starts.
Bits 7:4 DBLOCKSIZE: Data block size
Define the data block length when the block data transfer mode is selected:
0000: (0 decimal) lock length = 2
0
= 1 byte
0001: (1 decimal) lock length = 2
1
= 2 bytes
0010: (2 decimal) lock length = 2
2
= 4 bytes
0011: (3 decimal) lock length = 2
3
= 8 bytes
0100: (4 decimal) lock length = 2
4
= 16 bytes
0101: (5 decimal) lock length = 2
5
= 32 bytes
0110: (6 decimal) lock length = 2
6
= 64 bytes
0111: (7 decimal) lock length = 2
7
= 128 bytes
1000: (8 decimal) lock length = 2
8
= 256 bytes
1001: (9 decimal) lock length = 2
9
= 512 bytes
1010: (10 decimal) lock length = 2
10
= 1024 bytes
1011: (11 decimal) lock length = 2
11
= 2048 bytes
1100: (12 decimal) lock length = 2
12
= 4096 bytes
1101: (13 decimal) lock length = 2
13
= 8192 bytes
1110: (14 decimal) lock length = 2
14
= 16384 bytes
1111: (15 decimal) reserved
Bit 3 DMAEN: DMA enable bit
0: DMA disabled.
1: DMA enabled.
Bit 2 DTMODE: Data transfer mode selection 1: Stream or SDIO multibyte data transfer.
0: Block data transfer
1: Stream or SDIO multibyte data transfer
Bit 1 DTDIR: Data transfer direction selection
0: From controller to card.
1: From card to controller.
[0] DTEN: Data transfer enabled bit
Data transfer starts if 1b is written to the DTEN bit. Depending on the direction bit, DTDIR,
the DPSM moves to the Wait_S, Wait_R state or Readwait if RW Start is set immediately at
the beginning of the transfer. It is not necessary to clear the enable bit after the end of a data
transfer but the SDIO_DCTRL must be updated to enable a new data transfer