MPC5604B/C Microcontroller Reference Manual, Rev. 8
Freescale Semiconductor 155
8.3.1.9 TEST Mode Configuration Register (ME_TEST_MC)
This register configures system behavior during TEST mode. Please refer to Table 8-11 for details.
NOTE
Byte and half-word write accesses are not allowed to this register.
8.3.1.10 SAFE Mode Configuration Register (ME_SAFE_MC)
This register configures system behavior during SAFE mode. Please refer to Table 8-11 for details.
Address 0xC3FD_C024 Access: Supervisor read/write
0123456789101112131415
R
00000000
PDO
00
MVRON
DFLAON CFLAON
W
Reset0000000000011111
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R000000000
FMPLLON
FXOSCON
FIRCON
SYSCLK
W
Reset0000000000010000
Figure 8-10. TEST Mode Configuration Register (ME_TEST_MC)
Address 0xC3FD_C028 Access: Supervisor read/write
0123456789101112131415
R
00000000
PDO
00
MVRON
DFLAON CFLAON
W
Reset0000000010011111
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
000000000
FMPLLON
FXOSCON
FIRCON
SYSCLK
W
Reset0000000000010000
Figure 8-11. SAFE Mode Configuration Register (ME_SAFE_MC)
To Next Page
Loading...
