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Schweitzer Engineering Laboratories SEL-751 - Table 4.64 Order of Precedence of the Control Inputs; Figure 4.99 Example of the Effects of the Input Precedence

Schweitzer Engineering Laboratories SEL-751
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4.167
Date Code 20170927 Instruction Manual SEL-751 Relay
Protection and Logic Functions
Logic Settings (SET L Command)
Figure 4.99 shows an example of the effects of the input precedence, with
SC01PV set to 7. The vertical dashed line indicates the relationship between
SC01CU first being seen as a rising edge and the resultant outputs. This indi-
cates that there is no intentional lag between the control input asserting and
the count value changing. Most of the pulses in the diagram are on every sec-
ond processing interval. The “one processing interval” valley is an example
where the CD and CU pulses are only separated by one processing interval.
Figure 4.99 Example of the Effects of the Input Precedence
The shaded areas illustrate the precedence of the inputs:
When SC01R is asserted, the SC01LD input is ignored.
When SC01R or SC01LD is asserted, rising edges on the
SC01CU or SC01CD inputs are ignored.
SCnnQU Active High Output This Q Up output asserts when the Preset Value
(maximum count) is reached (SCn = SCnPV, n = 01
to 32).
SCnnQD Active High Output This Q Down output asserts when the counter is
equal to zero (SCn = 0, n = 01 to 32).
SCnn Output Value This counter output is an analog value that you can
use with analog comparison operators in a SEL
OGIC
control equation and view using the COU command.
Table 4.64 Order of Precedence of the Control Inputs
Order Input
1SCnnR
2SCnnLD
3SCnnCU
4SCnnCD
Table 4.63 Counter Input/Output Description (Sheet 2 of 2)
Name Type Description
SC01QU
SC01QD
Relay
Word
Bits
SC01R
SC01LD
SC01CU
SC01CD
SEL
OGIC
Settings
SC01PV = 7
Setting
SC01
Analog
= Sam
p
l
e
One Processing Interval
Two Processing Intervals
6
5
4
3
2
1
0

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