Schweitzer Engineering Laboratories SEL-751 - Table I.12 Example Synchrophasor Global Settings; Table I.13 Example Synchrophasor Logic Settings; Table I.14 Example Synchrophasor SEL OGIC Settings; Table I.15 Example Synchrophasor Port Settings

I.18
SEL-751 Relay Instruction Manual Date Code 20170927
Synchrophasors
IEEE C37.118 PMU Setting Example
The three Relay Word bits this example uses must be placed in certain
SEL
OGIC variables. Make the settings in Table I.14 in all seven setting groups.
Make the Table I.15 settings for serial port 3, using the SET P 3 command.
Table I.12 Example Synchrophasor Global Settings
Setting Description Value
FNOM Nominal System Frequency (50, 60 Hz) 60
EPMU Enable Synchronized Phasor Measurement (Y, N) Y
MRATE Messages per Second (1, 2, 4, 5, 10, 12, 15, 20, 30, 60) 10
PMAPP PMU Application (F := Fast Response, N := Narrow Band-
width)
FAST
PHCOMP Frequency-Based Phasor Compensation (Y, N) Y
PMSTN Station Name (16 characters) SAMPLE1
PMID PMU Hardware ID (1–65534) 14
PHDATAV Phasor Data Set, Voltages (V1, ALL, NA) V1
VCOMP Phase Voltage Angle Compensation Factor
(–179.99 to 180 degrees)
4.20
PHDATAI Phasor Data Set, Currents (I1, ALL, NA) ALL
ICOMP Phase Current Angle Compensation Factor
(–179.99 to 180 degrees)
3.50
NUMDSW Number of 16-bit Digital Status Words (0 or 1) 1
Table I.13 Example Synchrophasor Logic Settings
Logic
Setting
Description Value
TREA1 Trigger Reason Bit 1 (SELOGIC Equation) NA
TREA2 Trigger Reason Bit 2 (SEL
OGIC Equation) NA
TREA3 Trigger Reason Bit 3 (SEL
OGIC Equation) NA
TREA4 Trigger Reason Bit 4 (SEL
OGIC Equation) NA
PMTRIG Trigger (SEL
OGIC Equation) NA
Table I.14 Example Synchrophasor SEL
OGIC Settings
Setting Value
SV14 52A
SV15 LOP
SV16 FREQTRK
Table I.15 Example Synchrophasor Port Settings
Setting Description Value
PROTO Protocol (SEL, MOD, DNP, EVMSG, PMU, MBA, MBB,
MB8A, MB8B, MBTA, MBTB)
PMU
SPEED Data Speed (300 to 38400) 19200
STOPBIT Stop Bits (1, 2 bits) 1
RTSCTS Enable Hardware Handshaking (Y, N) N