1.11
Date Code 20170927 Instruction Manual SEL-751 Relay
Introduction and Specifications
Getting Started
Checking
Relay Status
Use the STA serial port command to view the SEL-751 operational status.
Note that offsets are shown only when the relay is online and tracking
frequency. If the DC offset exceeds a warning threshold, the analog value has
a “w” next to it. Analog channel dc offset and monitored component status are
listed in the status report depicted in Figure 1.4.
If a communications card with the DeviceNet protocol is present, the status
report depicted in Figure 1.5 applies. If a communications card with Modbus
RTU protocol is present, the status report depicted in Figure 1.4 applies.
=>>STA <Enter>
SEL-751 Date: 01/24/2017 Time: 14:06:58.751
FEEDER RELAY Time Source: Internal
Serial Num = 012345678901234
FID = SEL-751-X386-V0-Z007002-D20170116 CID = B3B2
PART NUM = 751301B6X6X7081A23X
SELF TESTS (W=Warn)
FPGA GPSB HMI RAM ROM CR_RAM NON_VOL CLOCK CID_FILE +0.9V +1.2V
OK OK OK OK OK OK OK OK OK 0.90 1.20
+1.5V +1.8V +2.5V +3.3V +3.75V +5.0V -1.25V -5.0V BATT
1.50 1.80 2.50 3.33 3.74 5.04 -1.25 -5.01 3.10
Option Cards
CARD_C CARD_D CARD_E CARD_Z
OK OK OK OK
Offsets
IA IB IC IN VA VB VC VS
12 12 12 8 -4 -7 -5 -7
Relay Enabled
=>>
Figure 1.4 STA Command Response—No Communications Card or EIA-232/
EIA-485 Communications Card
=>STA <Enter>
SEL-751 Date: 03/14/2011 Time: 14:03:48.984
FEEDER RELAY Time Source: Internal
Serial Num = 000000000000000
FID = SEL-751-X139-V0-Z001001-D20110309 CID = 05A2
PART NUM = 751501BA3CA70860230
SELF TESTS (W=Warn)
FPGA GPSB HMI RAM ROM CR_RAM NON_VOL CLOCK CID_FILE +0.9V +1.2V
OK OK OK OK OK OK OK OK OK 0.90 1.20
+1.5V +1.8V +2.5V +3.3V +3.75V +5.0V -1.25V -5.0V BATT
1.50 1.80 2.51 3.35 3.77 4.98 -1.26 -5.04 3.04
Option Cards
CARD_C CARD_D CARD_E CARD_Z
OK OK OK OK
DeviceNet
DN_MAC_ID ASA DN_RATE DN_STATUS
4 1a25 df42h AUTO 0000 0000
Offsets
IA IB IC IN VA VB VC VS
12 12 12 8 -4 -7 -5 -7
Relay Enabled
=>
Figure 1.5 STA Command Response—Communications Card/DeviceNet
Protocol