ARM Cortex-M3

Exceptions
5-26 Copyright © 2005-2008 ARM Limited. All rights reserved. ARM DDI 0337G
Non-Confidential
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Example 5-5 Implement a simple context switcher
; Example Context Switch (Assumes Thread is already on PSP)
MRS r12, PSP ; Recover PSP into R12
STMDB r12!, {r4-r11, LR} ; Push non-stack registers
LDR r0, =OldPSPValue ; Get pointer to old Thread Control Block
STR r12, [r0] ; Store SP into Thread Control Block
LDR r0, =NewPSPValue ; Get pointer to new Thread Control Block
LDR r12, [r0] ; Acquire new Process SP
LDMIA r12!, {r4-r11, LR} ; Restore non-stacked registers
MSR PSP, r12 ; Set PSP to R12
BX lr ; Return back to Thread
Note
In Example 5-4 on page 5-25 and Example 5-5, the only time the decision to move
Thread from MSP to PSP can be made, or the non-stacked registers can be guaranteed
not to have been modified by a stacked Handler, is when there is only one active
ISR/Handler.