ARM Cortex-M3

Embedded Trace Macrocell
ARM DDI 0337G Copyright © 2005-2008 ARM Limited. All rights reserved. 14-13
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• 1-2 bytes of exception.
The exception mapping is designed to enable the most frequent exceptions to be
encoded within one byte. The ETM exception tracing mapping is described in
Table 14-8.
Table 14-8 Exception tracing mapping
Number of bytes Exception ETMINTNUM Traced value
1 byte exception None - 0
1 byte exception IRQ1 17 1
1 byte exception IRQ2 18 2
1 byte exception IRQ3 19 3
1 byte exception IRQ4 20 4
1 byte exception IRQ5 21 5
1 byte exception IRQ6 22 6
1 byte exception IRQ7 23 7
1 byte exception IRQ0 16 8
1 byte exception Usage Fault 6 9
1 byte exception NMI 2 10
1 byte exception SVC 11 11
1 byte exception DebugMon 12 12
1 byte exception MemManage 4 13
1 byte exception PendSV 14 14
1 byte exception SysTick 15 15
2 bytes exception Reserved 8 16
2 bytes exception Reset 0 17
2 bytes exception Reserved 10 18
2 bytes exception HardFault 3 19
2 bytes exception Reserved 9 20
2 bytes exception BusFault 5 21