ARM Cortex-M3

Introduction
1-12 Copyright © 2005-2008 ARM Limited. All rights reserved. ARM DDI 0337G
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1.3 Execution pipeline stages
The following stages make up the pipeline:
• the Fetch stage
• the Decode stage
• the Execute stage.
Figure 1-2 shows the pipeline stages of the processor, and the pipeline operations that
take place at each stage.
Figure 1-2 Cortex-M3 pipeline stages
Fetch
Instruction
Decode
and
Register
Read
Fe
Address
generation
unit
Branch
Shift
ALU
and
Branch
Address
phase
and
writeback
Data
phase
Load/
Store
and
Branch
WR
Multiply
and
Divide
De
Ex
LSU branch
result
ALU branch not forwarded/speculated
LSU branch result
Branch forwarding
and speculation