System Debug
11-44 Copyright © 2005-2008 ARM Limited. All rights reserved. ARM DDI 0337G
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Table 11-33 describes the bit assignments of the AHB-AP Debug ROM Address
Register.
AHB-AP ID Register
This register defines the external interface on the access port.
Figure 11-20 shows the bit assignments of the AHB-AP ID Register.
Figure 11-20 AHB-AP ID Register
Table 11-34 describes the bit assignments of the AHB-AP ID Register.
Table 11-33 AHB-AP Debug ROM Address Register bit assignments
Bits Field Function
[31:0] Debug ROM address Base address of debug interface.
831 0728 2427 23 17 16 15
Reserved
4 3
AP TypeAP Variant
JEP-106 indentity
code
Revision
Class
JEP-106 continuation code
Table 11-34 AHB-AP ID Register bit assignments
Bits Field Function
[31:28] Revision This field is zero for the first implementation of an AP design, and is updated for
each major revision of the design.
[27:24] JEP-106 continuation code For an ARM-designed AP, this field has value 0b0100,
0x4
.
[23:17] JEP-106 identity code For an ARM-designed AP, this field has value 0b0111011,
0x3B
.
[16] Class 0b1: This AP is a Memory Access Port
[15:8] - Reserved. SBZ.
[7:4] AP Variant
0x1
: Cortex-M3 variant
[3:0] AP Type
0x1
: AMBA AHB bus
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