ARM Cortex-M3 User Manual

Memory Protection Unit
ARM DDI 0337G Copyright © 2005-2008 ARM Limited. All rights reserved. 9-3
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9.2 MPU programmer’s model
This sections describes the registers that control the MPU. It contains the following:
• Summary of the MPU registers
• Description of the MPU registers.
9.2.1 Summary of the MPU registers
Table 9-1 provides a summary of the MPU registers.
9.2.2 Description of the MPU registers
This section contains a description of the MPU registers.
MPU Type Register
Use the MPU Type Register to see how many regions the MPU supports. Read bits
[15:8] to determine if an MPU is present.
The register address, access type, and Reset state are:
Address
0xE000ED90
Access Read-only
Table 9-1 MPU registers
Name of register Type Address Reset value Page
MPU Type Register Read Only
0xE000ED90 0x00000800 page 9-3
MPU Control Register Read/Write
0xE000ED94 0x00000000 page 9-4
MPU Region Number register Read/Write
0xE000ED98 -page9-6
MPU Region Base Address register Read/Write
0xE000ED9C -page9-7
MPU Region Attribute and Size register(s) Read/Write
0xE000EDA0 -page9-8
MPU Alias 1 Region Base Address register Alias of
D9C 0xE000EDA4 -page9-11
MPU Alias 1 Region Attribute and Size register Alias of
DA0 0xE000EDA8 -page9-11
MPU Alias 2 Region Base Address register Alias of
D9C 0xE000EDAC -page9-11
MPU Alias 2 Region Attribute and Size register Alias of
DA0 0xE000EDB0 -page9-11
MPU Alias 3 Region Base Address register Alias of
D9C 0xE000EDB4 -page9-11
MPU Alias 3 Region Attribute and Size register Alias of
DA0 0xE000EDB8 -page9-11

ARM Cortex-M3 Specifications

General

Architecture	ARMv7-M
Instruction Set	Thumb-2
Pipeline Stages	3-stage
Interrupts	Nested Vectored Interrupt Controller (NVIC)
Interrupt Controller	Nested Vectored Interrupt Controller (NVIC)
Memory Protection Unit	Optional
Power Consumption	Varies by implementation
Max Clock Speed	Up to 100 MHz
Debugging	JTAG and Serial Wire Debug (SWD)
Operating Voltage	1.8V to 3.6V
Manufacturing Process	Varies by implementation
Core Type	32-bit