ARM Cortex-M3 User Manual

Programmer’s Model
ARM DDI 0337G Copyright © 2005-2008 ARM Limited. All rights reserved. 2-13
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2.6 Instruction set summary
This section provides:
• a summary of the processor 16-bit instructions
• a summary of the processor 32-bit instructions.
Table 2-4 lists the 16-bit Cortex-M3 instructions.
Table 2-4 16-bit Cortex-M3 instruction summary
Operation Assembler
Add register value and C flag to register value
ADC <Rd>, <Rm>
Add immediate 3-bit value to register ADD <Rd>, <Rn>, #<immed_3>
Add immediate 8-bit value to register ADD <Rd>, #<immed_8>
Add low register value to low register value ADD <Rd>, <Rn>, <Rm>
Add high register value to low or high register value ADD <Rd>, <Rm>
Add 4* (immediate 8-bit value) with PC to register ADD <Rd>, PC, #<immed_8> * 4
Add 4* (immediate 8-bit value) with SP to register ADD <Rd>, SP, #<immed_8> * 4
Add 4* (immediate 7-bit value) to SP ADD SP, #<immed_7> * 4
Bitwise AND register values AND <Rd>, <Rm>
Arithmetic shift right by immediate number ASR <Rd>, <Rm>, #<immed_5>
Arithmetic shift right by number in register ASR <Rd>, <Rs>
Branch conditional B<cond> <target address>
Branch unconditional B <target_address>
Bit clear BIC <Rd>, <Rm>
Software breakpoint BKPT <immed_8>
Branch with link BL <Rm>
Branch with link and exchange BLX <Rm>
Branch and exchange BX <Rm>
Compare not zero and branch CBNZ <Rn>,<label>
Compare zero and branch CBZ <Rn>,<label>

ARM Cortex-M3 Specifications

General

Architecture	ARMv7-M
Instruction Set	Thumb-2
Pipeline Stages	3-stage
Interrupts	Nested Vectored Interrupt Controller (NVIC)
Interrupt Controller	Nested Vectored Interrupt Controller (NVIC)
Memory Protection Unit	Optional
Power Consumption	Varies by implementation
Max Clock Speed	Up to 100 MHz
Debugging	JTAG and Serial Wire Debug (SWD)
Operating Voltage	1.8V to 3.6V
Manufacturing Process	Varies by implementation
Core Type	32-bit