ARM Cortex-M3 User Manual

Nested Vectored Interrupt Controller
ARM DDI 0337G Copyright © 2005-2008 ARM Limited. All rights reserved. 8-11
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Reset state Unpredictable
Figure 8-4 shows the bit assignments of the SysTick Reload Value Register.
Figure 8-4 SysTick Reload Value Register bit assignments
Table 8-5 describes the bit assignments of the SysTick Reload Value Register.
SysTick Current Value Register
Use the SysTick Current Value Register to find the current value in the register.
The register address, access type, and Reset state are:
Address
0xE000E018
Access Read/write clear
Reset state Unpredictable
Figure 8-5 shows the bit assignments of the SysTick Current Value Register.
Figure 8-5 SysTick Current Value Register bit assignments
31
0
RELOADReserved
2324
Table 8-5 SysTick Reload Value Register bit assignments
Bits Field Function
[31:24] - Reserved
[23:0] RELOAD Value to load into the SysTick Current Value Register when the counter reaches 0.
31
0
CURRENTReserved
2324

ARM Cortex-M3 Specifications

General

Architecture	ARMv7-M
Instruction Set	Thumb-2
Pipeline Stages	3-stage
Interrupts	Nested Vectored Interrupt Controller (NVIC)
Interrupt Controller	Nested Vectored Interrupt Controller (NVIC)
Memory Protection Unit	Optional
Power Consumption	Varies by implementation
Max Clock Speed	Up to 100 MHz
Debugging	JTAG and Serial Wire Debug (SWD)
Operating Voltage	1.8V to 3.6V
Manufacturing Process	Varies by implementation
Core Type	32-bit