ARM Cortex-M3

Memory Protection Unit
9-2 Copyright © 2005-2008 ARM Limited. All rights reserved. ARM DDI 0337G
Non-Confidential
Unrestricted Access
9.1 About the MPU
The MPU is an optional component for memory protection. The processor supports the
standard ARMv7 Protected Memory System Architecture (PMSAv7) model. The MPU
provides full support for:
• protection regions
• overlapping protection regions, with ascending region priority:
— 7 = highest priority
— 0 = lowest priority.
• access permissions
• exporting memory attributes to the system.
MPU mismatches and permission violations invoke the programmable-priority
MemManage fault handler. For more information, see Memory Manage Fault Address
Register on page 8-40.
You can use the MPU to:
• enforce privilege rules
• separate processes
• enforce access rules.