ARM Cortex-M3

Trace Port Interface Unit
ARM DDI 0337G Copyright © 2005-2008 ARM Limited. All rights reserved. 17-13
Figure 17-7 Formatter and Flush Control Register bit assignments
Table 17-9 describes the bit assignments of the Formatter and Flush Control Register.
Reserved
31 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
StopTrig
StopFI
Reserved
TrigFI
TrigEVT
TrigIn
Reserved
FOnMan
FOnTrig
FOnFlln
Reserved
EnFCont
EnFTC
Table 17-9 Formatter and Flush Control Register bit assignments
Bits Field Function
[31:14] - Reserved.
[13] StopTrig Stop the formatter after a Trigger Event is observed.
[12] StopFI Stop the formatter after a flush completes.
[11] - Reserved.
[10] TrigFI Indicates a trigger on Flush completion.
[9] TrigEVT Indicate a trigger on a Trigger Event.
[8] TrigIN Indicate a trigger on TRIGIN being asserted.
[7] - Reserved.
[6] FOnMan Manually generate a flush of the system.
[5] FOnTrig Generate flush using Trigger event.
[4] FOnFlln Generate flush using the FLUSHIN interface.