ARM Cortex-M3 User Manual

System Debug
ARM DDI 0337G Copyright © 2005-2008 ARM Limited. All rights reserved. 11-25
Unrestricted Access Non-Confidential
DWT Mask Registers 0-3
Use the DWT Mask Registers 0-3 to apply a mask to data addresses when matching
against COMP.
The register address, access type, and Reset state are:
Address
0xE0001024 , 0xE0001034 , 0xE0001044 , 0xE0001054
Access Read/write
Reset state -
Figure 11-11 shows the bit assignments of DWT Mask Registers 0-3.
Figure 11-11 DWT Mask Registers 0-3 bit assignments
Table 11-16 describes the bit assignments of DWT Mask Registers 0-3.
DWT Function Registers 0-3
Use the DWT Function Registers 0-3 to control the operation of the comparator. Each
comparator can:
• Match against either the PC or the data address. This is controlled by
CYCMATCH. This function is only available for comparator 0 (DWT_COMP0).
• Perform data value comparisons if associated address comparators have
performed an address match. This function is only available for comparator 1
(DWT_COMP1).
31 0
Reserved
4
MASK
3
Table 11-16 DWT Mask Registers 0-3 bit assignments
Bits Field Function
[31:4] - Reserved.
[3:0] MASK Mask on data address when matching against COMP. This is the size of the ignore mask.
So, ~0<<MASK forms the mask against the address to use. That is, DWT matching is performed
as:
(ADDR & (~0 << MASK)) == COMP
However, the actual comparison is slightly more complex to enable matching an address wherever it
appears on a bus. So, if COMP is 3, this matches a word access of 0, because 3 would be within the
word.

ARM Cortex-M3 Specifications

General

Architecture	ARMv7-M
Instruction Set	Thumb-2
Pipeline Stages	3-stage
Interrupts	Nested Vectored Interrupt Controller (NVIC)
Interrupt Controller	Nested Vectored Interrupt Controller (NVIC)
Memory Protection Unit	Optional
Power Consumption	Varies by implementation
Max Clock Speed	Up to 100 MHz
Debugging	JTAG and Serial Wire Debug (SWD)
Operating Voltage	1.8V to 3.6V
Manufacturing Process	Varies by implementation
Core Type	32-bit