ARM Cortex-M3 - Figure 2-5 Little-Endian and Big-Endian Memory Formats

Programmer’s Model
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Figure 2-5 Little-endian and big-endian memory formats
Halfword 0 at address E Halfword 1 at address C
Halfword 0 at address A Halfword 1 at address 8
Halfword 0 at address 6 Halfword 1 at address 4
Halfword 0 at address 2 Halfword 1 at address 0
Big-endian data format
31 24 23 16 15 8 7 0
Word at address 0
Byte 3 at
address 0
Byte 2 at
address 1
Byte 1 at
address 2
Byte 0 at
address 3
Word at address 4
Byte 3 at
address 4
Byte 2 at
address 5
Byte 1 at
address 6
Byte 0 at
address 7
Word at address 8
Byte 3 at
address 8
Byte 2 at
address 9
Byte 1 at
address A
Byte 0 at
address B
Word at address C
Byte 3 at
address C
Byte 2 at
address D
Byte 1 at
address E
Byte 0 at
address F
Halfword 1 at address E Halfword 0 at address C
Halfword 1 at address A Halfword 0 at address 8
Halfword 1 at address 6 Halfword 0 at address 4
Halfword 1 at address 2 Halfword 0 at address 0
Little-endian data format
31 24 23 16 15 8 7 0
Word at address 0
Byte 0 at
address 0
Byte 1 at
address 1
Byte 2 at
address 2
Byte 3 at
address 3
Word at address 4
Byte 0 at
address 4
Byte 1 at
address 5
Byte 2 at
address 6
Byte 3 at
address 7
Word at address 8
Byte 0 at
address 8
Byte 1 at
address 9
Byte 2 at
address A
Byte 3 at
address B
Word at address C
Byte 0 at
address C
Byte 1 at
address D
Byte 2 at
address E
Byte 3 at
address F