ARM Cortex-M3 - Table 2-5 32-Bit Cortex-M3 Instruction Summary

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Table 2-5 lists the 32-bit Cortex-M3 instructions.
Store register halfword [15:0] to register address + register offset STRH <Rd>, [<Rn>, <Rm>]
Subtract immediate 3-bit value from register SUB <Rd>, <Rn>, #<immed_3>
Subtract immediate 8-bit value from register value SUB <Rd>, #<immed_8>
Subtract register values SUB <Rd>, <Rn>, <Rm>
Subtract 4 (immediate 7-bit value) from SP SUB SP, #<immed_7> * 4
Operating system service call with 8-bit immediate call code SVC <immed_8>
Extract byte [7:0] from register, move to register, and sign-extend to 32 bits SXTB <Rd>, <Rm>
Extract halfword [15:0] from register, move to register, and sign-extend to 32 bits SXTH <Rd>, <Rm>
Test register value for set bits by ANDing it with another register value TST <Rn>, <Rm>
Extract byte [7:0] from register, move to register, and zero-extend to 32 bits UXTB <Rd>, <Rm>
Extract halfword [15:0] from register, move to register, and zero-extend to 32 bits UXTH <Rd>, <Rm>
Wait for event WFE <c>
Wait for interrupt WFI <c>
Table 2-4 16-bit Cortex-M3 instruction summary (continued)
Operation Assembler
Table 2-5 32-bit Cortex-M3 instruction summary
Operation Assembler
Add register value, immediate 12-bit value, and C bit
ADC{S}.W <Rd>, <Rn>, #<modify_constant(immed_12>
Add register value, shifted register value, and C bit ADC{S}.W <Rd>, <Rn>, <Rm>{, <shift>}
Add register value and immediate 12-bit value ADD{S}.W <Rd>, <Rn>, #<modify_constant(immed_12)>
Add register value and shifted register value ADD{S}.W <Rd>, <Rm>{, <shift>}
Add register value and immediate 12-bit value ADDW.W <Rd>, <Rn>, #<immed_12>
Bitwise AND register value with immediate 12-bit value AND{S}.W <Rd>, <Rn>, #<modify_constant(immed_12>
Bitwise AND register value with shifted register value AND{S}.W <Rd>, <Rn>, Rm>{, <shift>}
Arithmetic shift right by number in register ASR{S}.W <Rd>, <Rn>, <Rm>