ARM Cortex-M3 User Manual

System Debug
ARM DDI 0337G Copyright © 2005-2008 ARM Limited. All rights reserved. 11-13
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11.5 DWT
The DWT is an optional unit that performs the following debug functionality:
• It contains four comparators that you can configure as a hardware watchpoint, an
ETM trigger, a PC sampler event trigger, or a data address sampler event trigger.
The first comparator, DWT_COMP0, can also compare against the clock cycle
counter, CYCCNT. The second comparator, DWT_COMP1, can also be used as
a data comparator. You can configure the DWT to contain only one comparator
that can be used as a watchpoint or as a trigger. If only one comparator is present
then data matching is not supported.
• The DWT contains counters for:
— clock cycles (CYCCNT)
— folded instructions
— Load Store Unit (LSU) operations
— sleep cycles
— CPI (all instruction cycles except for the first cycle)
— interrupt overhead.
Note
An event is emitted each time a counter overflows.
• You can configure the DWT to emit PC samples at defined intervals, and to emit
interrupt event information.
11.5.1 Summary and description of the DWT registers
Table 11-6 on page 11-14 lists the DWT registers.
Note
You can configure any of the DWT registers to be present or not present. Any register
that is configured as not present reads as zero.

ARM Cortex-M3 Specifications

General

Architecture	ARMv7-M
Instruction Set	Thumb-2
Pipeline Stages	3-stage
Interrupts	Nested Vectored Interrupt Controller (NVIC)
Interrupt Controller	Nested Vectored Interrupt Controller (NVIC)
Memory Protection Unit	Optional
Power Consumption	Varies by implementation
Max Clock Speed	Up to 100 MHz
Debugging	JTAG and Serial Wire Debug (SWD)
Operating Voltage	1.8V to 3.6V
Manufacturing Process	Varies by implementation
Core Type	32-bit