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ARM Cortex-M3 - Table 19-10 Low Power Output Ports Timing Parameters; Table 19-11 AHB Output Ports Timing Parameters

ARM Cortex-M3
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AC Characteristics
19-6 Copyright © 2005-2008 ARM Limited. All rights reserved. ARM DDI 0337G
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Table 19-10 shows the timing parameters for the low power output ports.
Table 19-11 shows the timing parameters for the AHB output ports.
Clock uncertainty 50% CURRPRI[7:0]
Clock uncertainty 70% TRCENA
Clock uncertainty 50% INTERNALSTATE
Table 19-10 Low power output ports timing parameters
Output delay Min. Output delay Max. Signal name
Clock uncertainty 50% SLEEPING
Clock uncertainty 50% SLEEPDEEP
Clock uncertainty 50% SLEEPHOLDACKn
Clock uncertainty 50% WICLOAD
Clock uncertainty 50% WICCLEAR
Clock uncertainty 50% WICDSACKn
Clock uncertainty 50% WICMASKNMI
Clock uncertainty 50% WICMASKMON
Clock uncertainty 50% WICMASKISR
Clock uncertainty 50% WICMASKRXEV
Table 19-11 AHB output ports timing parameters
Output delay Min. Output delay Max. Signal name
Clock uncertainty 50% HTRANSI[1:0]
Clock uncertainty 50% HSIZEI[2:0]
Clock uncertainty 50% HPROTI[3:0]
Clock uncertainty 50% MEMATTRI[1:0]
Table 19-9 Miscellaneous output ports timing parameters (continued)
Output delay Min. Output delay Max. Signal name

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