ARM Cortex-M3 User Manual

System Debug
ARM DDI 0337G Copyright © 2005-2008 ARM Limited. All rights reserved. 11-27
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[11:10] DATAVSIZE Defines the size of the data in the COMP register that is to be matched:
00 = byte
01 = halfword
10 = word
11 = Unpredictable.
[9] LNK1ENA Read-only:
0 = DATAVADDR1 not supported
1 = DATAVADDR1 supported (enabled).
[8] DATAVMATCH This bit is only available in comparator 1. When DATAVMATCH is set, this comparator
performs data value compares.
The comparators given by DATAVADDR0 and DATAVADDR1provide the address for the
data comparison. If DATAVMATCH is set in DWT_FUNCTION1, the FUNCTION setting
for the comparators given by DATAVADDR0 and DATAVADDR1 are overridden and those
comparators only provide the address match for the data comparison.
[7] CYCMATCH Only available in comparator 0. When set, this comparator compares against the clock cycle
counter.
[6] - Reserved.
[5] EMITRANGE Emit range field. Reserved to permit emitting offset when range match occurs. Reset clears
the EMITRANGE bit. PC sampling is not supported when EMITRANGE is enabled.
EMITRANGE only applies for:
FUNCTION = b0001, b0010, b0011, b1100, b1101, b1110, and b1111.
[4] - Reserved.
[3:0] FUNCTION See Table 11-18 on page 11-28 for FUNCTION settings.
Table 11-17 Bit functions of DWT Function Registers 0-3 (continued)
Bits Field Function

ARM Cortex-M3 Specifications

General

Architecture	ARMv7-M
Instruction Set	Thumb-2
Pipeline Stages	3-stage
Interrupts	Nested Vectored Interrupt Controller (NVIC)
Interrupt Controller	Nested Vectored Interrupt Controller (NVIC)
Memory Protection Unit	Optional
Power Consumption	Varies by implementation
Max Clock Speed	Up to 100 MHz
Debugging	JTAG and Serial Wire Debug (SWD)
Operating Voltage	1.8V to 3.6V
Manufacturing Process	Varies by implementation
Core Type	32-bit