Xilinx virtex-5 fpga User Manual

148 www.xilinx.com Virtex-5 FPGA User Guide
UG190 (v5.0) June 19, 2009
Chapter 4: Block RAM
FIFO Almost Full/Empty Flag Offset Range
The offset ranges for Almost Empty and Almost Full are listed in Table 4-19.
The Almost Full and Almost Empty offsets are usually set to a small value of less than 10
to provide a warning that the FIFO is about to reach its limits. Since the full capacity of any
FIFO is normally not critical, most applications use the ALMOST_FULL flag not only as a
warning but also as a signal to stop writing.
Table 4-18: FIFO Data Depth
Data Width
Block RAM
Memory
FIFO Capacity
FIFO18 FIFO36 Standard FWFT
x4 8192 8193 8194
x4 x9 4096 4097 4098
x9 x18 2048 2049 2050
x18 x36 1024 1025 1026
x36 x72 512 513 514
Notes:
1. ALMOST_EMPTY_OFFSET and ALMOST_FULL_OFFSET for any design must be less than the total
FIFO depth.
Table 4-19: FIFO Almost Full/Empty Flag Offset Range
Data Width
ALMOST_EMPTY_OFFSET
ALMOST_FULL_OFFSET
Standard FWFT
(1)
FIFO18 FIFO36 Min Max Min Max Min Max
Multirate (Asynchronous) – EN_SYN=FALSE
x4 5 8187 6 8188 4 8187
x4 x9 5 4091 6 4092 4 4091
x9 x18 5 2043 6 2044 4 2043
x18 x36 5 1019 6 1020 4 1019
x36 x72 5 507 6 508 4 507
Synchronous mode – EN_SYN=TRUE
x4 1 8190 1 8190
x4 x9 1 4094 1 4094
x9 x18 1 2046 1 2046
x18 x36 1 1022 1 1022
x36 x72 1 510 1 510
Notes:
1. For limitations under certain conditions, refer to Equation 4-1 on page 146.

Xilinx virtex-5 fpga Specifications

General

Brand	Xilinx
Model	virtex-5 fpga
Category	Computer Hardware
Language	English