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Xilinx virtex-5 fpga User Manual

Xilinx virtex-5 fpga
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Virtex-5 FPGA User Guide www.xilinx.com 251
UG190 (v5.0) June 19, 2009
Specific Guidelines for I/O Supported Standards
HSTL_ II_DCI, HSTL_ IV_DCI, HSTL_ II_DCI_18, HSTL_ IV_DCI_18
HSTL_II_DCI provides on-chip split thevenin termination powered from V
CCO
, creating
an equivalent termination voltage of V
CCO
/2. HSTL_IV_ DCI provides single termination
to V
CCO
(V
TT
). HSTL_II_DCI and HSTL_IV_ DCI are intended to be used in bidirectional
links.
HSTL_ II_T_DCI, HSTL_ II_T_DCI_18
HSTL_ II_T_DCI and HSTL_ II_T_DCI_18 provide on-chip split-thevenin termination
powered from V
CCO
that creates an equivalent termination voltage of V
CCO
/2 when these
standards are 3-stated. When not 3-stated, these two standards do not have termination.
DIFF_HSTL_ II, DIFF_HSTL_II_18
Differential HSTL class II pairs complimentary single-ended HSTL_II type drivers with a
differential receiver. Differential HSTL class II is intended to be used in bidirectional links.
Differential HSTL can also be used for differential clock and DQS signals in memory
interface designs.
DIFF_HSTL_II_DCI, DIFF_HSTL_II_DCI_18
Differential HSTL class II pairs complimentary single-ended HSTL_II type drivers with a
differential receiver, including on-chip differential split-thevenin termination. Differential
HSTL class II is intended to be used in bidirectional links. Differential HSTL can also be
used for differential clock and DQS signals in memory interface designs.
DIFF_HSTL_I, DIFF_HSTL_I_18
Differential HSTL class I pairs complimentary single-ended HSTL_I type drivers with a
differential receiver. Differential HSTL class I is intended to be used in unidirectional links.
DIFF_HSTL_I_DCI, DIFF_HSTL_I_DCI_18
Differential HSTL class I pairs complimentary single-ended HSTL_I type drivers with a
differential receiver, including on-chip differential split-thevenin termination. Differential
HSTL class I is intended to be used in unidirectional links.

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Xilinx virtex-5 fpga Specifications

General IconGeneral
BrandXilinx
Modelvirtex-5 fpga
CategoryComputer Hardware
LanguageEnglish

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