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Xilinx virtex-5 fpga User Manual

Xilinx virtex-5 fpga
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Virtex-5 FPGA User Guide www.xilinx.com 383
UG190 (v5.0) June 19, 2009
A
asynchronous
clocking
119
distributed RAM 181
global set/reset 127
mux 36
set/reset in register or latch 180
B
Bitslip 366
See ISERDES 353
guidelines for use 367
operation 366
timing 368
block RAM
defined
115
asynchronous clocking 119
ECC 158
Primitive 161
ECC Port 162
operating modes
NO_CHANGE
118
READ_FIRST 118
WRITE_FIRST 118
ports 125
synchronous clocking 119
BLVDS 296
BUFG 31
BUFGCE 32
BUFGCTRL 28
BUFGMUX 33
BUFGMUX_CTRL 35
with CE 37
BUFIO 41
BUFR 42
C
CLB 173
array size by device 177
distributed RAM 180
maximum distributed RAM 177
number of flip-flops 177
number of LUTs by device 177
number of shift registers 177
register/latch configuration 179
slice description 174
SLICEL 174
SLICEM 174
CLK2X 55
CLKDV 55
CLKFB 52
CLKFX 55
clock capable I/O 40
clock forwarding 347
clock regions 39
clock tree 38
clocking wizard 83
clocks
global clock buffers
26, 27
I/O clock buffer 41
regional clock buffers 40, 42
regions 38
resources 29
CMT 47
allocation in device 48
combinatorial input path 319
configuration
DCM
65
D
DCI 220
defined 220
DCLK 53
DCM 48
allocation in device 48
attributes 58, 61
clock deskew 48, 63
clocking wizard 83
configuration 65
DCM_ADV 51
DCM_BASE 50
design guidelines 63
deskew 67
dynamic reconfiguration 49, 73
frequency synthesis 49, 67
output ports 54
phase shifting 49, 68, 85
ports 51
timing models 84
DDR
IDDR
319
delay element
See IDELAY
325
Differential 250
HSTL Class II 256
HSTL Class II (1.8V) 264, 267
LVPECL 297
SSTL Class II (1.8V) 286, 291
SSTL2 Class II (2.5V) 277, 281
differential termination 294
DIFF_TERM 237, 294
E
Error Correction Code (ECC) 158
F
FIFO 139
attributes 147
cascading 157
FWFT mode 144
operating modes 144
ports 143
primitive 142
standard mode 144
status flags 145
timing parameters 149
G
GCLK 38
global clocks
clock buffers
25, 26
clock I/O inputs 26
GSR
defined
127
GTL 248
defined 248
GTL_DCI 248
GTLP 249
GTLP_DCI 249
H
HSTL 250
defined 250
class I 252
class I (1.8V) 263, 274
class II 254
Index

Table of Contents

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Xilinx virtex-5 fpga Specifications

General IconGeneral
BrandXilinx
Modelvirtex-5 fpga
CategoryComputer Hardware
LanguageEnglish

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