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Xilinx virtex-5 fpga

Xilinx virtex-5 fpga
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174 www.xilinx.com Virtex-5 FPGA User Guide
UG190 (v5.0) June 19, 2009
Chapter 5: Configurable Logic Blocks (CLBs)
Slice Description
Every slice contains four logic-function generators (or look-up tables), four storage
elements, wide-function multiplexers, and carry logic. These elements are used by all slices
to provide logic, arithmetic, and ROM functions. In addition to this, some slices support
two additional functions: storing data using distributed RAM and shifting data with 32-bit
registers. Slices that support these additional functions are called SLICEM; others are
called SLICEL. SLICEM (shown in Figure 5-3) represents a superset of elements and
connections found in all slices. SLICEL is shown in Figure 5-4.
X-Ref Target - Figure 5-2
Figure 5-2: Row and Column Relationship between CLBs and Slices
Slice
X1Y1
COUTCOUT
CINCIN
Slice
X0Y1
CLB
UG190_5_02_122605
Slice
X1Y0
COUTCOUT
Slice
X0Y0
CLB
Slice
X3Y1
COUTCOUT
CINCIN
Slice
X2Y1
CLB
Slice
X3Y0
COUTCOUT
Slice
X2Y0
CLB

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