Xilinx virtex-5 fpga User Manual

Virtex-5 FPGA User Guide www.xilinx.com 227
UG190 (v5.0) June 19, 2009
SelectIO Resources General Guidelines
Figure 6-11 illustrates split termination inside a Virtex-5 device.
Driver with Termination to V
CCO
(Single Termination)
Some I/O standards (e.g., HSTL Class IV) require an output termination to V
CCO
.
Figure 6-12 illustrates an output termination to V
CCO
.
DCI can provide an output termination to V
CCO
using single termination. In this case, DCI
only controls the impedance of the termination, but not the driver. Both GTL and HSTL
standards need 50 Ω external reference resistors. The DCI I/O standards supporting
drivers with single termination are: GTL_DCI, GTLP_DCI, HSTL_IV_DCI, and
HSTL_IV_DCI_18.
X-Ref Target - Figure 6-11
Figure 6-11: Input Termination to V
CCO
/2 Using DCI Split Termination
2R
2R
UG190_6_09_021206
V
CCO
V
REF
IOB
Z
0
Virtex-5 DCI
X-Ref Target - Figure 6-12
Figure 6-12: Driver with Termination to V
CCO
without DCI
R
UG190_c6_10_022609
V
CCO
IOB
Z
0
Virtex-5 FPGA

Xilinx virtex-5 fpga Specifications

General

Brand	Xilinx
Model	virtex-5 fpga
Category	Computer Hardware
Language	English