Xilinx virtex-5 fpga User Manual

260 www.xilinx.com Virtex-5 FPGA User Guide
UG190 (v5.0) June 19, 2009
Chapter 6: SelectIO Resources
HSTL Class IV
Figure 6-50 shows a sample circuit illustrating a valid unidirectional termination technique
for HSTL Class IV.
X-Ref Target - Figure 6-50
Figure 6-50: HSTL Class IV Unidirectional Termination
Z
0
IOB
IOB
HSTL_IV
HSTL_IV
ug190_6_48_030306
V
TT
= 1.5V
R
P
= Z
0
= 50Ω
V
TT
= 1.5V
R
P
= Z
0
= 50Ω
Z
0
IOB
IOB
HSTL_IV_DCI
HSTL_IV_DCI
V
CCO
= 1.5V
R
VRP
= Z
0
= 50Ω
V
REF
= 0.9V
+
–
V
REF
= 0.9V
+
–
External Termination
DCI
V
CCO
= 1.5V
R
VRP
= Z
0
= 50Ω

Xilinx virtex-5 fpga Specifications

General

Brand	Xilinx
Model	virtex-5 fpga
Category	Computer Hardware
Language	English