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Xilinx virtex-5 fpga User Manual

Xilinx virtex-5 fpga
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Virtex-5 FPGA User Guide www.xilinx.com 225
UG190 (v5.0) June 19, 2009
SelectIO Resources General Guidelines
Controlled Impedance Driver with Half Impedance (Source Termination)
DCI also provides drivers with one half of the impedance of the reference resistors. This
doubling of the reference resistor value reduces the static power consumption through
these resistors by a factor of half. The DCI I/O standards supporting controlled impedance
drivers with half-impedance are LVDCI_DV2_15, LVDCI_DV2_18, and LVDCI_DV2_25.
Figure 6-7 illustrates a controlled driver with half impedance inside a Virtex-5 device. The
reference resistors R must be 2 × Z
0
in order to match the impedance of Z
0
.
Input Termination to V
CCO
(Single Termination)
Some I/O standards require an input termination to V
CCO
(see Figure 6-8).
DCI can also provide input termination to V
CCO
using single termination. The termination
resistance is set by the reference resistors. Both GTL and HSTL standards are controlled by
50 Ω reference resistors. The DCI I/O standards supporting single termination are:
GTL_DCI, GTLP_DCI, HSTL_III_DCI, HSTL_III_DCI_18, HSTL_IV_DCI, and
HSTL_IV_DCI_18.
X-Ref Target - Figure 6-7
Figure 6-7: Controlled Impedance Driver with Half Impedance
UG190_6_05_021206
IOB
R/2
Virtex-5 DCI
Z
0
X-Ref Target - Figure 6-8
Figure 6-8: Input Termination to V
CCO
without DCI
R
UG190_c6_06_022609
V
CCO
V
REF
IOB
Z
0
Virtex-5 FPGA

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Xilinx virtex-5 fpga Specifications

General IconGeneral
BrandXilinx
Modelvirtex-5 fpga
CategoryComputer Hardware
LanguageEnglish

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