Xilinx virtex-5 fpga - HSTL Class II (1.8 V)

Virtex-5 FPGA User Guide www.xilinx.com 265
UG190 (v5.0) June 19, 2009
Specific Guidelines for I/O Supported Standards
Table 6-22 lists the differential HSTL Class I (1.8V) DC voltage specifications.
HSTL Class II (1.8V)
Figure 6-56 shows a sample circuit illustrating a valid termination technique for HSTL
Class II (1.8V) with unidirectional termination.
Table 6-22: Differential HSTL Class I (1.8V) DC Voltage Specifications
Min Typ Max
V
CCO
1.7 1.8 1.9
V
TT
– V
CCO
× 0.5 –
V
IN
(DC) –0.30 – V
CCO
+0.30
V
DIFF
(DC) 0.20 – V
CCO
+0.60
V
CM
(DC)
(1)
0.83 – 1.08
V
DIFF
(AC) 0.40 – V
CCO
+0.60
V
X
(Crossover)
(2)
0.83 – 1.08
Notes:
1. Common mode voltage: V
CM
=V
P
– ((V
P
–V
N
)/2)
2. Crossover point: V
X
where V
P
–V
N
=0 (AC coupled)
X-Ref Target - Figure 6-56
Figure 6-56: HSTL Class II (1.8V) with Unidirectional Termination
Z
0
IOB
IOB
HSTL_II_18
HSTL_II_18
ug190_6_53_030306
V
TT
= 0.9V
R
P
= Z
0
= 50Ω
V
TT
= 0.9V
R
P
= Z
0
= 50Ω
Z
0
IOB
IOB
HSTL_II_DCI_18
HSTL_II_DCI_18
V
CCO
= 1.8V
2R
VRP
= 2Z
0
= 100Ω
2R
VRN
= 2Z
0
= 100Ω
V
REF
= 0.9V
+
–
V
REF
= 0.9V
+
–
External Termination
DCI
V
CCO
= 1.8V
2R
VRP
= 2Z
0
= 100Ω
2R
VRN
= 2Z
0
= 100Ω