Xilinx virtex-5 fpga User Manual

Virtex-5 FPGA User Guide www.xilinx.com 235
UG190 (v5.0) June 19, 2009
Virtex-5 FPGA SelectIO Primitives
IBUFDS_DIFF_OUT
Figure 6-23 shows the differential input buffer primitive with a complementary output
(OB). This primitive is for expert users only.
OBUFDS
Figure 6-24 shows the differential output buffer primitive.
OBUFTDS
Figure 6-25 shows the differential 3-state output buffer primitive.
X-Ref Target - Figure 6-23
Figure 6-23: Differential Input Buffer Primitive (IBUFDS_DIFF_OUT)
UG190_6_97_122208
IBUFDS_DIFF_OUT
Output
into FPGA
O
OB
I
IB
Input
from Device Pad
X-Ref Target - Figure 6-24
Figure 6-24: Differential Output Buffer Primitive (OBUFDS)
ug190_6_21_022806
+
–
OB
O
I
OBUFDS
Input from
FPGA
Output to
Device Pads
X-Ref Target - Figure 6-25
Figure 6-25: Differential 3-state Output Buffer Primitive (OBUFTDS)
ug190_6_22_022806
+
–
OB
O
I
T
OBUFTDS
Input from
FPGA
3-state Input
Output to
Device Pads

Xilinx virtex-5 fpga Specifications

General

Brand	Xilinx
Model	virtex-5 fpga
Category	Computer Hardware
Language	English