Xilinx virtex-5 fpga User Manual

236 www.xilinx.com Virtex-5 FPGA User Guide
UG190 (v5.0) June 19, 2009
Chapter 6: SelectIO Resources
IOBUFDS
Figure 6-26 shows the differential input/output buffer primitive.
Virtex-5 FPGA SelectIO Attributes/Constraints
Access to some Virtex-5 FPGA I/O resource features (e.g., location constraints, input delay,
output drive strength, and slew rate) is available through the attributes/constraints
associated with these features. For more information a Constraints Guide is available on
the Xilinx website with syntax examples and VHDL/Verilog reference code. This guide is
available inside the Software Manuals at:
http://www.support.xilinx.com/support/software_manuals.htm
Location Constraints
The location constraint (LOC) must be used to specify the I/O location of an instantiated
I/O primitive. The possible values for the location constraint are all the external port
identifiers (e.g., A8, M5, AM6, etc.). These values are device and package size dependent.
The LOC attribute uses the following syntax in the UCF file:
INST <I/O_BUFFER_INSTANTIATION_NAME> LOC =
"<EXTERNAL_PORT_IDENTIFIER>";
Example:
INST MY_IO LOC=R7;
IOSTANDARD Attribute
The IOSTANDARD attribute is available to choose the values for an I/O standard for all
I/O buffers. The supported I/O standards are listed in Table 6-39. The IOSTANDARD
attribute uses the following syntax in the UCF file:
INST <I/O_BUFFER_INSTANTIATION_NAME> IOSTANDARD=”<IOSTANDARD VALUE>”;
The IOSTANDARD default for single-ended I/O is LVCMOS25, for differential I/Os the
default is LVDS_25.
X-Ref Target - Figure 6-26
Figure 6-26: Differential Input/Output Buffer Primitive (IOBUFDS)
ug190_6_23_022806
IOBUFDS
I/O
to/from
device pad
I (Input)
from FPGA
O (Output)
to FPGA
T
3-state Input
+
–
+
–
IO
IOB

Xilinx virtex-5 fpga Specifications

General

Brand	Xilinx
Model	virtex-5 fpga
Category	Computer Hardware
Language	English