SINAMICS DCP
List Manual (LH21), 05/2016
409
4 Faults and alarms
4.2 List of faults and alarms
6yy:
Internal buffer overflow for receive data of a DRIVE-CLiQ connection.
7yy:
Internal buffer overflow for send data of a DRIVE-CLiQ connection.
8yy:
The component clock cycles cannot be combined with one another
900:
The lowest common multiple of the clock cycles in the system is too high to be determined.
901:
The lowest common multiple of the clock cycles in the system cannot be generated with the hardware.
Remedy: - check the DRIVE-CLiQ wiring.
- Reduce the number of components on the DRIVE-CLiQ line involved and distribute these to other DRIVE-CLiQ
sockets of the Control Unit. This means that communication is uniformly distributed over several lines.
Re fault value = 1yy - 4yy in addition:
- increase the sampling times (p0112, p0115, p4099). If necessary, for DCC or FBLOCKS, change the assignment of
the run-time group (p21000, p20000) so that the sampling time (r21001, r20001) is increased.
- if necessary, reduce the number of cyclically calculated blocks (DCC) and/or function blocks (FBLOCKS).
- reduce the function modules (r0108).
- establish the conditions for operation with a current controller sampling time of 31.25 µs (at the DRIVE-CLiQ line,
only operate Motor Modules and Sensor Modules with this sampling time and only use a permitted Sensor Module
(e.g. SMC20, this means a 3 at the last position of the order number)).
- For an NX, the corresponding Sensor Module for a possibly existing second measuring system should be
connected to a free DRIVE-CLiQ socket of the NX.
Re fault value = 8yy in addition:
- check the clock cycles settings (p0112, p0115, p4099). Clock cycles on a DRIVE-CLiQ line must be perfect integer
multiples of one another. As clock cycle on a line, all clock cycles of all drive objects in the previously mentioned
parameters apply, which have components on the line involved.
Re fault value = 9yy in addition:
- check the clock cycles settings (p0112, p0115, p4099). The lower the numerical value difference between two clock
cycles, the higher the lowest common multiple. This behavior has a significantly stronger influence, the higher the
numerical values of the clock cycles.
F01341 Topology: Maximum number of DRIVE-CLiQ components exceeded
Drive object: CU_DCP, TM150, TM15DI_DO, TM31
Cause: Too many DRIVE-CLiQ components were defined in the actual topology.
Note:
Pulse enable is withdrawn and prevented.
Remedy: - check the DRIVE-CLiQ wiring.
- reduce the number components on the DRIVE-CLiQ line involved in order to maintain the maximum quantity
structure.
F01354 Topology: Actual topology indicates an illegal component
Drive object: CU_DCP, TM150, TM15DI_DO, TM31
Cause: The actual topology indicates at least one illegal component.
Fault value (r0949, interpret hexadecimal):
yyxx hex: yy = component number, xx = cause.
xx = 1: Component at this Control Unit not permissible.
xx = 2: Component in combination with another component not permissible.
Note:
Pulse enable is prevented.
Remedy: Remove the illegal components and restart the system.
F01355 Topology: Actual topology changed
Drive object: CU_DCP, TM150, TM15DI_DO, TM31
Cause: The device target topology (p0099) does not correspond to the device actual topology (r0098).
The fault only occurs if the topology was commissioned using the automatic internal device mechanism and not using
the commissioning software.
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