Xilinx virtex-5 fpga User Manual

Virtex-5 FPGA User Guide www.xilinx.com 231
UG190 (v5.0) June 19, 2009
SelectIO Resources General Guidelines
X-Ref Target - Figure 6-16
Figure 6-16: HSTL DCI Usage Examples
RR
RR
R
R
R
R
RR
2R
2R
R
2R
R
2R
2R
2R
2R
2R
ug190_6_14_021206
Conventional
DCI Transmit
Conventional
Receive
Conventional
Transmit
DCI Receive
DCI Transmit
DCI Receive
Bidirectional
Reference
Resistor
Recommended
Z
0
VRN = VRP = R = Z
0
50Ω
VRN = VRP = R = Z
0
50Ω
VRN = VRP = R = Z
0
50Ω
VRN = VRP = R = Z
0
50Ω
HSTL_I HSTL_II HSTL_III HSTL_IV
N/A
N/A
R
R
R
R
Z
0
R
R
2R
2R
2R
2R
Z
0
Z
0
Z
0
Z
0
Z
0
Z
0
Z
0
Z
0
Z
0
Z
0
Z
0
Z
0
Z
0
Z
0
Z
0
Virtex-5
DCI
Virtex-5
DCI
Virtex-5
DCI
Z
0
Virtex-5
DCI
Virtex-5
DCI
Virtex-5
DCI
Virtex-5
DCI
Virtex-5
DCI
Virtex-5
DCI
Virtex-5
DCI
Virtex-5
DCI
Virtex-5
DCI
Virtex-5
DCI
Virtex-5
DCI
Virtex-5
DCI
Virtex-5
DCI
Virtex-5
DCI
Virtex-5
DCI
2R
2R
2R
2R
Z
0
R
R
V
CCO
/2
V
CCO
/2
V
CCO
/2
V
CCO
/2
V
CCO
/2 V
CCO
/2
V
CCO
V
CCO
V
CCO
V
CCO
V
CCO
V
CCO
V
CCO
V
CCO
V
CCO
V
CCO
V
CCO
V
CCO
V
CCO
V
CCO
V
CCO
V
CCO
V
CCO
V
CCO
V
CCO
V
CCO
V
CCO
V
CCO
Notes:
1. Z
0
is the recommended PCB trace impedance.

Xilinx virtex-5 fpga Specifications

General

Brand	Xilinx
Model	virtex-5 fpga
Category	Computer Hardware
Language	English