ARM Cortex-M3 User Manual

Embedded Trace Macrocell
14-18 Copyright © 2005-2008 ARM Limited. All rights reserved. ARM DDI 0337G
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Unrestricted Access
Synchronization Frequency Read only 0xE00411E0 Yes Reads as 0x00000400 .
ETM ID Read only
0xE00411E4 Yes For a description, see page 14-21.
Configuration Code Extension Read only
0xE00411E8 Yes For a description, see page 14-21.
Extended External Input Selector -
0xE00411EC No No extended external inputs
implemented.
TraceEnable Start/Stop Embedded ICE Read/write
0xE00411F0 Yes Bits [19:16] configure DWT
comparator inputs to use as stop
resources. Bits [3:0] configure
DWT Comparator inputs to use as
start resources.
Embedded ICE Behavior Control - 0xE00411F4 No Embedded ICE (DWT
comparator) inputs use the default
behavior.
CoreSight Trace ID Read/write
0xE0041200 Yes Implemented as normal.
Values of
0x00 , 0x70-0x7F are
reserved and must not be used
when the ETM is active.
OS Save/Restore -
0xE0041304 -
0xE0041308
No OS Save/Restore not
implemented. RAZ, ignore writes.
Power Down Status Register Read only
0xE0041314 Yes For a description, see page 14-22.
ITMISCIN Read only
0xE0041EE0 Yes Sets [1:0] to EXTIN[1:0], [4] to
COREHALT.
ITTRIGOUT Write only
0xE0041EE8 Yes Sets [0] to TRIGGER.
ITATBCTR2 Read only
0xE0041EF0 Yes Sets [0] to ATREADY.
ITATBCTR0 Write only
0xE0041EF8 Yes Sets [0] to ATVALID.
Integration Mode Control Read/write
0xE0041F00 Yes Implemented as normal.
Claim Tag Read/write
0xE0041FA0 -
0xE0041FA4
Yes Implements the 4-bit claim tag.
Lock Access Write only 0xE0041FB0 -
0xE0041FB4
Yes Implemented as normal.
Lock Status Read only
0xE0041Fb4 Yes Implemented as normal.
Table 14-9 ETM registers (continued)
Name Type Address Present Description

ARM Cortex-M3 Specifications

General

Architecture	ARMv7-M
Instruction Set	Thumb-2
Pipeline Stages	3-stage
Interrupts	Nested Vectored Interrupt Controller (NVIC)
Interrupt Controller	Nested Vectored Interrupt Controller (NVIC)
Memory Protection Unit	Optional
Power Consumption	Varies by implementation
Max Clock Speed	Up to 100 MHz
Debugging	JTAG and Serial Wire Debug (SWD)
Operating Voltage	1.8V to 3.6V
Manufacturing Process	Varies by implementation
Core Type	32-bit