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ARM Cortex-M3 User Manual

ARM Cortex-M3
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Revisions
ARM DDI 0337G Copyright © 2005-2008 ARM Limited. All rights reserved. B-3
Unrestricted Access Non-Confidential
Addition of note about configuring flash patch registers to be
present or not
FPB programmer’s model on page 11-6
First bullet point updated DWT on page 11-13
Addition of note about configuring DWT registers to be
present or not
Summary and description of the DWT registers on
page 11-13
DWT Control Register reset state updated DWT Control Register on page 11-15
DWT Control Register bit assignments updated Figure 11-5 on page 11-16 and Table 11-7 on page 11-16
Addition of note about configuring ITM registers to be
present or not
Summary and description of the ITM registers on
page 11-30
ITM Trace Control Register TSENA field bit function
updated
Table 11-22 on page 11-34
Addition of note about configuring AHB-AP registers to be
present or not
Summary and description of the AHB-AP registers on
page 11-39
AHB-AP Banked Data Register DATA field reset value
removed
Table 11-32 on page 11-43
Addition of information about absence of debug
functionality
About the DP on page 13-2
Information about exclusive memory accesses updated Exclusives on page 12-6 and Exclusives on page 12-7
Note about bit-band accesses updated Bit-band accesses on page 12-13
ETM block diagram updated Figure 14-1 on page 14-3
HCLK and CLK replaced by FCLK Table 14-2 on page 14-4, Table 14-3 on page 14-5,
Table 14-4 on page 14-5, Table 14-5 on page 14-6, and
Table 14-6 on page 14-6
Table B-1 Differences between issue E and issue F (continued)
Change Location

Table of Contents

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ARM Cortex-M3 Specifications

General IconGeneral
ArchitectureARMv7-M
Instruction SetThumb-2
Pipeline Stages3-stage
InterruptsNested Vectored Interrupt Controller (NVIC)
Interrupt ControllerNested Vectored Interrupt Controller (NVIC)
Memory Protection UnitOptional
Power ConsumptionVaries by implementation
Max Clock SpeedUp to 100 MHz
DebuggingJTAG and Serial Wire Debug (SWD)
Operating Voltage1.8V to 3.6V
Manufacturing ProcessVaries by implementation
Core Type32-bit

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