Xilinx virtex-5 fpga User Manual

258 www.xilinx.com Virtex-5 FPGA User Guide
UG190 (v5.0) June 19, 2009
Chapter 6: SelectIO Resources
Figure 6-48 shows a sample circuit illustrating a valid termination technique for
differential HSTL Class II (1.5V) with bidirectional DCI termination.
Table 6-18 lists the differential HSTL Class II DC voltage specifications.
X-Ref Target - Figure 6-48
Figure 6-48: Differential HSTL (1.5V) Class II DCI Bidirectional Termination
Z
0
IOB
IOB
DIFF_HSTL_II_DCI DIFF_HSTL_II_DCI
V
CCO
= 1.5V
2R
VRP
= 2Z
0
= 100Ω
2R
VRN
= 2Z
0
= 100Ω
+
–
DCI
V
CCO
= 1.5V
2R
VRP
= 2Z
0
= 100Ω
2R
VRN
= 2Z
0
= 100Ω
DIFF_HSTL_II_DCI
ug190_6_46_020306
Z
0
DIFF_HSTL_II_DCI
DIFF_HSTL_II_DCI DIFF_HSTL_II_DCI
V
CCO
= 1.5V
2R
VRP
= 2Z
0
= 100Ω
2R
VRN
= 2Z
0
= 100Ω
+
–
V
CCO
= 1.5V
2R
VRP
= 2Z
0
= 100Ω
2R
VRN
= 2Z
0
= 100Ω
Table 6-18: Differential HSTL Class II DC Voltage Specifications
Min Typ Max
V
CCO
1.40 1.50 1.60
V
TT
– V
CCO
× 0.5 –
V
IN
(DC) –0.30 – V
CCO
+0.30
V
DIFF
(DC) 0.20 – V
CCO
+0.60
V
CM
(DC)
(1)
0.68 – 0.90
V
DIFF
(AC) 0.40 – V
CCO
+0.60
V
X
(Crossover)
(2)
0.68 – 0.90
Notes:
1. Common mode voltage: V
CM
=V
P
– ((V
P
–V
N
)/2)
2. Crossover point: V
X
where V
P
–V
N
=0 (AC coupled)

Xilinx virtex-5 fpga Specifications

General

Brand	Xilinx
Model	virtex-5 fpga
Category	Computer Hardware
Language	English