ARM Cortex-M3 User Manual

Exceptions
ARM DDI 0337G Copyright © 2005-2008 ARM Limited. All rights reserved. 5-29
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Imprecise data bus error IMPRECISERR BusFault Late bus error because of data
access. Exact instruction is no
longer known. This is pended and
not synchronous. It does not cause
FORCED.
BUSERR
No Coprocessor NOCP UsageFault Truly does not exist, or not present
bit.
NOCPERR
Undefined Instruction UNDEFINSTR UsageFault Unknown instruction. STATERR
Attempt to execute an
instruction when in an
invalid ISA state. For
example, not Thumb
INVSTATE UsageFault Attempt to execute in an invalid
EPSR state. For example, after a
BX type instruction has changed
state. This includes states after
return from exception including
inter-working states.
STATERR
Return to
PC=EXC_RETURN
when not enabled or with
invalid magic number
INVPC UsageFault Illegal exit, caused either by an
illegal EXC_RETURN value, an
EXC_RETURN and stacked EPSR
value mismatch, or an exit while
the current EPSR is not contained
in the list of currently active
exceptions.
STATERR
Illegal unaligned load or
store
UNALIGNED UsageFault This occurs when any load-store
multiple instruction attempts to
access a non-word aligned
location. It can be enabled to occur
for any load-store that is unaligned
to its size using the
UNALIGN_TRP bit.
CHKERR
Divide By 0 DIVBYZERO UsageFault This can be enabled to occur when
SDIV or UDIV is executed with a
divisor of 0, and the DIV_0_TRP
bit is set.
CHKERR
SVC - SVCall System request (Service Call). -
Table 5-10 Faults (continued)
Fault Bit name Handler Notes Trap enable bit

ARM Cortex-M3 Specifications

General

Architecture	ARMv7-M
Instruction Set	Thumb-2
Pipeline Stages	3-stage
Interrupts	Nested Vectored Interrupt Controller (NVIC)
Interrupt Controller	Nested Vectored Interrupt Controller (NVIC)
Memory Protection Unit	Optional
Power Consumption	Varies by implementation
Max Clock Speed	Up to 100 MHz
Debugging	JTAG and Serial Wire Debug (SWD)
Operating Voltage	1.8V to 3.6V
Manufacturing Process	Varies by implementation
Core Type	32-bit