ARM Cortex-M3 User Manual

ii Copyright © 2005-2008 ARM Limited. All rights reserved. ARM DDI 0337G
Unrestricted Access
Cortex-M3
Technical Reference Manual
Copyright © 2005-2008 ARM Limited. All rights reserved.
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The following changes have been made to this book.
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This document is Non-Confidential. The right to use, copy and disclose this document may be subject to
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Unrestricted Access is an ARM internal classification.
Change History
Date Issue Confidentiality Change
15 December 2005 A Confidential First Release
13 January 2006 B Non-Confidential Confidentiality status amended
10 May 2006 C Non-Confidential First Release for r1p0
27 September 2006 D Non-Confidential First Release for r1p1
13 June 2007 E Non-Confidential Minor update with no technical changes
11 April 2008 F Confidential Limited release for SC300 r0p0
26 June 2008 G Non-Confidential First Release for r2p0

ARM Cortex-M3 Specifications

General

Architecture	ARMv7-M
Instruction Set	Thumb-2
Pipeline Stages	3-stage
Interrupts	Nested Vectored Interrupt Controller (NVIC)
Interrupt Controller	Nested Vectored Interrupt Controller (NVIC)
Memory Protection Unit	Optional
Power Consumption	Varies by implementation
Max Clock Speed	Up to 100 MHz
Debugging	JTAG and Serial Wire Debug (SWD)
Operating Voltage	1.8V to 3.6V
Manufacturing Process	Varies by implementation
Core Type	32-bit