ARM Cortex-M3 User Manual

Memory Protection Unit
ARM DDI 0337G Copyright © 2005-2008 ARM Limited. All rights reserved. 9-17
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DMB/DSB is not necessary because the Private Peripheral Bus is a strongly ordered
memory area. However, a DSB is necessary before the effect on the MPU takes place,
such as the end of a context switcher.
An ISB is necessary if the code that programs the MPU region or regions is entered
using a branch or call. If the code is entered using a return from exception, or by taking
an exception, then an ISB is not necessary.
9.5.2 Updating an MPU region using two or three words
You can program directly using two or three words, depending on how the information
is divided:
; R1 = region number
; R2 = address
; R3 = size, attributes in one
MOV R0,#NVIC_BASE
ADD R0,#MPU_REG_CTRL
STR R1,[R0,#0]; region number
STR R2,[R0,#4]; address
STR R3,[R0,#8]; size, attributes
An STM can optimize this:
; R1 = region number
; R2 = address
; R3 = size, attributes in one
MOV R0,#NVIC_BASE
ADD R0,#MPU_REG_CTRL
STM R0,{R1-R3}; region number, address, size, and attributes
You can do this in two words for pre-packed information. This means that the base
address register contains the region number in addition to a region-valid bit. This is
useful when the data is statically packed, for example in a boot list or a Process Control
Block (PCB).
; R1 = address and region number in one
; R2 = size and attributes in one
MOV R0,#NVIC_BASE
ADD R0,#MPU_REG_CTRL
STR R1,[R0,#4]; address and region number
STR R2,[R0,#8]; size and attributes
An STM can optimize this:
; R1 = address and region number in one
; R2 = size and attributes in one
MOV R0,#NVIC_BASE
ADD R0,#MPU_REG_CTRL

ARM Cortex-M3 Specifications

General

Architecture	ARMv7-M
Instruction Set	Thumb-2
Pipeline Stages	3-stage
Interrupts	Nested Vectored Interrupt Controller (NVIC)
Interrupt Controller	Nested Vectored Interrupt Controller (NVIC)
Memory Protection Unit	Optional
Power Consumption	Varies by implementation
Max Clock Speed	Up to 100 MHz
Debugging	JTAG and Serial Wire Debug (SWD)
Operating Voltage	1.8V to 3.6V
Manufacturing Process	Varies by implementation
Core Type	32-bit