ARM Cortex-M3 User Manual

System Debug
ARM DDI 0337G Copyright © 2005-2008 ARM Limited. All rights reserved. 11-15
Unrestricted Access Non-Confidential
DWT Control Register
Use the DWT Control Register to enable the DWT unit.
The register address, access type, and Reset state are:
Address
0xE0001000
Access Read/write
Reset state
0x40000000 if four comparators for watchpoints and triggers are present
0x4F000000 if four comparators for watchpoints only are present
0x10000000 if only one comparator is present
0x1F000000 if one comparator for watchpoints and not triggers is present
0x00000000 if DWT is not present.
Figure 11-5 on page 11-16 shows the bit assignments of the DWT Control Register.
PID6 Read-only 0xE0001FD8 0x00 Va lu e 0x00
PID7 Read-only 0xE0001FDC 0x00 Va lu e 0x00
PID0 Read-only 0xE0001FE0 0x02 Va lu e 0x02
PID1 Read-only 0xE0001FE4 0xB0 Va lu e 0xB0
PID2 Read-only 0xE0001FE8 0x2B Va lu e 0x2B
PID3 Read-only 0xE0001FEC 0x00 Va lu e 0x00
CID0 Read-only 0xE0001FF0 0x0D Va lu e 0x0D
CID1 Read-only 0xE0001FF4 0xE0 Va lu e 0xE0
CID2 Read-only 0xE0001FF8 0x05 Va lu e 0x05
CID3 Read-only 0xE0001FFC 0xB1 Va lu e 0xB1
Table 11-6 DWT register summary (continued)
Name Type Address Reset value Description

ARM Cortex-M3 Specifications

General

Architecture	ARMv7-M
Instruction Set	Thumb-2
Pipeline Stages	3-stage
Interrupts	Nested Vectored Interrupt Controller (NVIC)
Interrupt Controller	Nested Vectored Interrupt Controller (NVIC)
Memory Protection Unit	Optional
Power Consumption	Varies by implementation
Max Clock Speed	Up to 100 MHz
Debugging	JTAG and Serial Wire Debug (SWD)
Operating Voltage	1.8V to 3.6V
Manufacturing Process	Varies by implementation
Core Type	32-bit