ARM Cortex-M3

Signal Descriptions
ARM DDI 0337G Copyright © 2005-2008 ARM Limited. All rights reserved. A-5
Unrestricted Access Non-Confidential
VECTADDREN Input Reserved. Must be tied to 1'b0.
DNOTITRANS Input Static tie-off that forces the processor to not permit ICode and DCode AHB
transactions to occur at the same time. This permits a simple bus
multiplexer to be instantiated externally to the processor.
AUXFAULT[31:0] Input Auxiliary fault status information from the system.
IFLUSH Input Reserved. Instruction flush, must be tied to 0.
DBGRESTART Input External restart request.
Table A-3 Miscellaneous signals (continued)
Name Direction Description